Key Advantages of Choosing FPGAs Over MCUs
Key Advantages of Choosing FPGAs Over MCUs
by Jay Aggarwal, Lattice Semi
When creating a new electronic system, designers have a myriad of decisions they need to make. One of the most critical is system architecture and the associated silicon used to implement it. Considering the critical function these parts play and the variety of options currently available, making the wrong decision can mean the difference between success and failure in the market.
If you’ve found this blog, you’re likely familiar with Field Programmable Gate Arrays (FPGAs) as well as alternative types of silicon they compete with. I thought it would be helpful to compare and contrast some of the key differences between FPGAs and their primary competition, microcontrollers (MCUs).
Key Advantages of Designing with FPGAs
The topmost advantage of designing with FPGAs is their fundamental programmable fabric, which allows the designer to rapidly program (and re-program) them to perform nearly any function. One way to visualize this fabric is to picture many little programmable logic “islands” (blocks) in a “sea” of programmable interconnect. Each logic block contains some combinatorial logic and a register, and each block can be programmed to perform a desired function. Meanwhile, the programmable interconnect can be used to connect the FPGA’s general-purpose input/outputs (GPIO) to the inputs and outputs (I/O) of selected logic blocks, and to connect the logic blocks to each other. Also, the GPIO banks may be programmed to support different electrical interfaces, input impedances and output slew (edge) rates.
The FPGA’s programmable fabric can be used to implement data processing algorithms in a massively parallel fashion. For example, suppose an algorithm needs to perform 100 additions on similar pieces of data. An FPGA can be configured to perform them all at the same time on the same clock edge. This either allows 100 times more calculations to be performed in the same period of time, or the same number of calculations to be performed at 1/100th of the clock frequency.
This inherent flexibility helps speed time-to-market for FPGA-based application designs as the functionality of the integrated FPGA can be determined, or changed, in parallel with the system design being finalized. This re-programmability also makes it possible for developers to extend the lifecycle of an FPGA (and, in turn, the systems using them) by updating or changing the FPGAs functionality via software update.
Key Limitations of Designing with MCUs
MCUs come at things from a different direction. Once the hardware platform has been established, the functionality of the silicon is fixed and baton is passed to the software developers who capture their portion of the design using a programming language like C or C++. The ensuing C/C++ source code is passed to a compiler, which generates the machine code that will be executed by the MCU.
While MCUs are very capable at performing decision-making tasks, the von Neumann architecture underlying most MCUs is inefficient at executing many data processing algorithms. This is because the way this architecture works is to retrieve an instruction from memory, decode that instruction, fetch a piece of data (if necessary), execute the instruction, and store the result (if necessary). This is, of course, a highly simplified description, but I think it paints the picture. The end result is that the MCU performs its operations sequentially (one after the other). Executing the vast number of operations required to implement a DSP on an MC also requires a high-speed system clock, which increases the amount of power consumed by the application
Older system architectures take advantage of both MCUs and FPGAs by mating the two devices, with the MCU providing the decision-making capabilities and the FPGA performing compute intensive data processing. In more advanced system architectures, engineering teams are taking advantage of FPGAs inherent flexibility and performance benefits and replacing the MCU entirely and consolidating both decision-making and data processing tasks in the FPGA, which generally yields a smaller physical design footprint and lower power consumption. Engineers can do this by using “soft core” MCUs in the FPGA, where the MCU functionality is implemented in the programmable fabric. FPGAs may also contain various functions implemented as “hard cores” directly in the silicon, including SRAM, non-volatile memory, DSPs, PLLs, clock managers, and SERDES blocks.
Getting Started with FPGAs
The traditional way to capture an FPGA design is to use a hardware description language (HDL), such as Verilog or VHDL, to describe the design at what is known as the register transfer level (RTL) of abstraction. This RTL source code is then fed to a synthesis engine (think “compiler”), which will generate the configuration file that will be used to program the FPGA. For developers that aren’t familiar with HDL, there are GUI-based tools (Lattice Propel™ is an example) that allow things like processor-based designs to be captured using a drag-and-drop interface. In this case, one or more processor cores and associated peripheral functions are selected and connected using the tool’s GUI, and the tool will automatically generate the RTL to be fed to the synthesis engine.
For those looking to start working with (or experimenting with) FPGAs, Lattice is a long time, globally recognized providers of low power, high performance FPGAs in small form factors. The Lattice Nexus™ FPGA platform is based on a 28 nm FD-SOI process that consumes 75 percent lower power and provides a 100X lower soft error rate in comparison to similar competing FPGAs. The Nexus platform was used to develop our CrossLink™-NX, Certus™-NX, CertusPro™-NX, and Mach™-NX FPGA families, giving developers an array of application-optimized FPGA solutions to choose from.
Lattice also offers a suite of intuitive easy-to-use design tools, including Lattice Diamond® and Lattice Radiant®. These are complemented by Lattice Propel, which is a complete set of graphical and command-line tools that can be used to create, analyze, compile, and debug both the hardware design of an FPGA-based processor system and the software designed for that processor system.
To make application development using our low power FPGAs even easier, Lattice developed comprehensive collections of modular hardware platforms, example demonstrations, reference designs, IP cores, software tools for development, and custom design services we call solution stacks. These stacks simplify and accelerate the development of common FPGA-based applications used in several of the markets we serve, including Lattice sensAI™ for AI/ML applications at the Edge, mVision™ for embedded vision, Automate™ for industrial automation, and Sentry™ for hardware security.
To complement all of the above, Lattice has partnered with the Lattice Education Competence Center (LEC2), our official training provider, to deliver an extensive library of training programs that give developers the practical, hands-on information required to create applications based on low power Lattice FPGAs – from initial concept to the actual physical implementation. These trainings feature first-hand knowledge from a highly experienced team of FPGA developers who have designed applications for a broad range of markets.
If you’re just getting started with FPGAs and would like to learn more, be sure to check out Lattice Semiconductor’s An FPGA Primer blog and the “How to Get Started with FPGAs” webinar at the element14 community (replay available here).