Last month, InnoFour co-hosted a hands-on Questa Base workshop in Oslo together with Inventas and Siemens EDA. 25 FPGA developers spent an afternoon discovering advanced simulation, debugging, and verification capabilities that most of them had never used before – despite holding licences for them. The event was a success, and we are already planning the next one.
The centrepiece of the afternoon was a hands-on lab led by Faïçal Chtourou, DVT Field Application Engineer at Siemens EDA, covering QIS simulation flows, advanced debugging with Visualizer, performance profiling, and coverage closure – all with tools and environments provided on site.
Alongside the lab, two additional sessions rounded out the programme. Marius Elvegård, Senior FPGA Developer at Inventas, presented a practical introduction to building UVVM-based testbenches and automating regression workflows with HDL Regression. Yngve Hafting, Lecturer at Oslo University, gave a guest lecture on Cocotb – focusing on timing, the event queue, and principles for reliable stimulus generation and checking.
